Tunneling Field Effect Transistor Technology by Lining Zhang & Mansun Chan

Author:Lining Zhang & Mansun Chan
Language: eng
Format: epub
Publisher: Springer International Publishing, Cham

4.3 Logic

4.3.1 ALL N-type TFET Design

As described in Sect. 4.2.4, the lack of matching n-type and p-type TFETs increases the difficulties in designing complementary TFET circuits. To mitigate the inferior subthreshold characteristics of p-type TFET, all n-type TFET pass-transistor logic (PTL) circuit has been developed to maintain the advantages of TFET under low-VDD operation. The PTL circuit utilizes transistors as switches to pass logic signals between nodes of a circuit.

Figure 4.9 shows the schematic of PTL-based two-input AND using n-type TFETs [24]. Compared with the MOSFET counterpart, additional n-type TFET (enclosed in dashed/red box) is required to ensure correct operation under A = “low” and B = “high.” Without this modification, the prohibition of TFET (controlled by signal B) to conduct current from source (indicated with bold line) to drain hinders the discharging of output node. Moreover, due to the inevitably poor “high” of using n-type transistor only, a weak p-type pull-up MOSFET is employed to restore a solid “high” in the output node.

Fig. 4.9Schematic of a PTL two-way AND using entire n-type TFET. The dashed/dotted boxes show extra n-type TFET and p-type MOSFET to ensure correct logic function and restore good “1”, respectively [24]

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